Even from highly experienced technologists I often hear talk about how certain operations cause a CPU cache to "flush". This seems to be i...
We have long been planning to cover the caching mechanisms in CPUs. As a shared knowledge base for the discussions in this session we chose the following two articles by Martin Thompson among other things known for his work on the LMAX Disruptor: CPU Cache Flushing Fallacy including a good overview over the different caches in modern Intel CPUs. Write Combining exemplifying the advanced mechanisms one can find in today’s CPUs and how one can make use of them.
Principles of mechanical sympathy for creating performant software: Memory access patterns, false sharing, the single-writer principle, and natural batching.